Electronics

In a sandwich structure having a honeycomb core between a pair of composite face sheets, an insert is provided that passes through such structure. The insert terminates in an opening, flush or below the top face sheet and has a flange which overlaps and contacts the face sheet from below. Such opening can receive attaching hardware and a fastener which clamps the attaching hardware against the face sheet and the flange below, for good thermal conductivity between attaching hardware and the face sheet and thus the core and the bottom face sheet of the sandwich structure.

A method for the fabrication of active semiconductor and high-temperature superconducting device of the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K.

A microwave integrated circuit internal-node waveform probing arrangement using a portable ungrounded voltage sensing probe and a commercially available transition analyzer instrument are disclosed. Harmonic frequency and phase processing are accomplished on the probe sensed voltage waveforms from internal nodes of for example a C-band monolithic microwave integrated circuit (MMIC) power amplifier circuit device. The disclosed probing is applied to determining signal voltage and signal current flow waveforms for the MMIC device.

An optical electronic integrated (circuit (OEIC) having optical waveguides s device interconnects. An optical waveguide is formed by depositing, in an oxygen-free atmosphere, a film of semiconductor material on a semiconductor substrate at a temperature that substantially diminishes the porosity of the film and the diffusion of material from the substrate into the film. The semiconductor film, which has an index of refraction greater than that of the substrate, is etched to form the optical waveguide on the substrate.

This invention relates to improving the production of 2223 (Pb,Bi)SrCaCuO powder and to improving the production of superconducting 2223 and 2212 (Pb,Bi)SrCaCuO parts to be used as, among other things, superconducting magnetic shields, vibrational dampeners, and bus bars.

The invention works by taking optical reflectance measurements on the deposited layers at different wavelengths and fitting the measured results to extract the thicknesses and compositions. The process of the present invention simultaneously measures the thicknesses of elemental and binary semiconductors' layers and the thicknesses and composition of ternary layers.

Chip-like stacks of thinned chips are mounted in wells etched into a substrate. A "chip-like" stack is a stack of chips, which in the aggregate have a height approximately equal to that of a single conventional chip. These chip-like stacks are mounted in a variety of packages. In a preferred embodiment, the stacks are mounted in wells within the substrate of an integrated circuit and the stack is provided with a patterned overlay so that all the circuit connections can be made from the upper surface of the stack. The patterned overlay is protected by a planar insulator.

A novel indium phosphide (InP) based heterojunction bipolar transistor (HBT) is described. A II-VI compound, cadmium sulfide (CdS), is used as the emitter to improve the emitter injection efficiency and reduce recombination losses. The cadmium sulfide emitter is applied following the epitaxial growth of III-V compound collector and base regions. The large valence band discontinuity (.quadrature.E=0.75 eV) between CdS and InP allows InP to be used for both the base and collector material.

A sonar sensor array having a multi-layer tiling arrangement for the individual elements that increases surface area available for each element while maintaining the inter-element spacing required to avoid spatial aliasing when the received signals are combined to form a sonar beam. The array comprises outer and inner arrays of transducer elements for converting an acoustic signal to an electrical response. The transducer elements of the outer array are positioned such than a grid of isolation spaces separates each of the transducer elements.

A predictive read cache reduces primary cache miss latency in a microprocessor system that includes a microprocessor, a main memory and a primary cache memory connected between the main memory and the microprocessor via an instruction address bus, a data address bus and a data bus. The predictive read cache tracks the pattern of data read addresses that cause misses in the primary cache and associates the pattern with the specific instruction that generates the pattern of miss addresses.