Air Force

Chip trojan leak blocker

Circuit-level design technique addresses hardware security concerns related to outsourced manufacturing and supply chain corruption

Software & Information Technology Electronics

The technology was designed by the Air Force Research Laboratory’s Information Directorate in Rome, New York.

Air Force scientists have invented a new way to block data leakage trojans through dual-rail encoding and randomization. The technology is owned by the U.S. government but is available to private companies who would use it in new products or services.

The use of unsecured foreign factories for semiconductor fabrication has created an opportunity for nefarious parties to insert malicious hardware, or hardware trojans, onto a chip during manufacturing.

There are two different types of hardware trojans; those that affect the functionality or reliability of a chip, and those that capture the data being processed by a chip, known as a data leakage trojan.

The consequences of a data leakage trojan can allow attackers to obtain encryption keys as they are processed or allow unauthorized user privilege escalation in a system.

A data leakage trojan is hard to detect because it can maintain the original functionality of a chip even when triggered, and it typically results in little or no increase in the chip’s area or power consumption. On the other hand, in order for an attacker to successfully inject a data leakage trojan, he or she must have a complete understanding of the design, so that critical information at desired locations can be obtained. This can be done either before fabrication by inspecting the netlist and layout, or after fabrication by reverse-engineering a chip procured from the fabrication facility or on the market.

Air Force scientists have solved part of the untrustworthy fabrication risk problem by introducing a design method such that even when the design is entirely known to an attacker and a data leakage trojan is injected subsequently, only partial information can be obtained.

This data leakage resistance scheme uses dual-rail encoding to randomize the information in the chip and uses three-dimensional integration technology (allowing two chips to be fabricated separately and then stacked vertically) to protect the critical information that is needed to decode the data anywhere on-chip. With this approach, even when the entire design is known to the attacker, who also has full access to the outsourced portion, it is still not possible to fully identify the information in the chip.

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