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Air Force

High performance current-steering digital-to-analog converter

DAC that largely overcomes the resolution-bandwidth trade-off

Electronics
The US Air Force has designed a digital-to-analog converter that operates 75% faster (top) and improves the spurious free dynamic range (bottom).
The US Air Force has designed a digital-to-analog converter that operates 75% faster (top) and improves the spurious free dynamic range (bottom).

The US Air Force Research Laboratory (AFRL) Sensors Directorate has developed a patent-pending current-steering digital-to-analog converter (DAC) that achieves improved switching times (up to 75% faster) in high-speed (gigahertz), high-resolution (8-14 bits) applications resulting in improvement of spurious free dynamic range (SFDR). In conventional DAC, the large ratio between current magnitudes of the least significant bit (LSB) and most significant bit (MSB) cells causes differences in response times that create output glitches. The AFRL device utilizes a novel circuit design that drives currents comparable in magnitude to the MSB through the LSB and low order bit cells resulting in greatly enhanced switching speeds and minimized glitching thus improved spectral performance (e.g. SFDR).

The AFRL technology is amenable to improving the spectra of DAC using CMOS, bipolar, and other process technologies and transistors (III-V and HBT, such as SiGe, GaN, GaAs, etc).  The approach is suited for any resolution, current-steering, gigahertz digital-to-analog converters, either as a standalone application or as subcomponents incorporated into other systems including wideband radio frequency signal processing and general purpose baseband communications, instrumentation, radar, and electronic warfare systems.  In addition, this technology advancement is pertinent to both Nyquist rate and Delta-Sigma DAC in both binary and segmented topologies.

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