The US Air Force Research Laboratory’s Sensors Directorate (AFRL/RY) has developed and tested an interleaved delta sigma DAC that can synthesize frequencies from near DC (0 Hz) to near the sampling frequency (fs) by switching among low-, band-, and high-pass noise transfer functions. The technology overcomes inherent trade-offs between bandwidth and maximum output frequency without sacrificing the benefits of an all-digital architecture.
The Air Force’s technology is suited for highly integrated silicon systems-on-chip and offers considerable benefits to compound semiconductor applications, including lower part counts that reduce complexity, weight, size, and power requirements, in addition to simplifying digital adjustment and calibration. AFRL/RY’s delta sigma DAC enables the potential for multi-standard (e.g. communications and radar) devices through on-the-fly reconfiguration of power and transmission requirements.
- Spectrally Agile: Switching amongst low-, band-, and high-pass noise transfer functions improves bandwidth over a broader RF spectrum range
- Higher I/Q Accuracy: Wholly digital up-conversion increases in-phase/quadrature modulation precision
- Reduced Design Complexity: Enables lower parts count devices with reduced weight/size and decreased calibration requirements
- US Patent 9,065,472 is available for license and commercialization
- Potential for collaboration with US Air Force Research Laboratory Sensors Directorate researchers