Synchronous demultiplexer circuit and method

  • US Patent No. 8339298
  • Issued: December 25, 2012
  • Status: Active

A digital counting circuit with multiple outputs is used to clock interlaced 16-bit data words into separate digital-to-analog converters in the correct sequence for each of eight hydrophone channels. The circuit utilizes a programmable memory to detect a synchronizing bit pattern.

Do you have questions or need more information on a specific technology? Let's talk.

Contact Us